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What I am trying to achieve is to synthesize very simplistic vhdl to bitstream and test on a proto board.

Actually language does not matter. Anyone achieved so far so that you can directly generate bit from any form of code without the requirement of running vendor specific IDE’s ?

I stumbled upon within my search-foo skills but wanted to ask you guys before I desperately give each option a try unless someone reports success with some of the options.

I know this can be done because I compiled and synthed petalinux from scratch and got a fully functional bitstream. Now I am just trying to experiment on simplistic approaches.

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如果您正在谈论 fpga 配置双流,那么只有在您了解将使用该比特流的硬件时,才可能在没有供应商工具的情况下构建它。主要供应商不会发布有关其 fpga 内部结构的知识,因此构建配置双流实际上并不可行。

有一些开源项目旨在对一些最简单的 fpga 进行逆向工程并提供工具,但到目前为止,我只知道 IceStorm,针对的是 Lattice iCE40 系列 fpga。

于 2018-07-18T18:39:42.413 回答