问题标签 [system-verilog-dpi]

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50 问题

0 投票

1 回答

715 浏览

system-verilog - 是否可以使用带有 DPI 的打包结构

假设我有一个打包的结构：

我想将它传递给 C 函数：

如何读取 C 端的值？：

system-verilog system-verilog-dpi

0 投票

1 回答

466 浏览

system-verilog - UVM DPI-C 功能导入

有人可以告诉我为什么我们需要 DPI-C 函数导入来执行 UVM 特定功能，比如uvm_hdl_force甚至uvm_hdl_deposit当存在强制和存款系统 verilog 构造时？C 函数在这些方面提供了哪些额外的灵活性？

提前致谢

0 投票

1 回答

1387 浏览

system-verilog - Detect timescale in System Verilog

How do I detect the timescale precision used in a simulation from the source code ?. Consider I have a configuration parameter(cfg_delay_i) of some delay value given by user in timeunits as fs .If the user gives 1000 , my code has to wait 1000fs or 1ps before executing further.

If the timescale precision is 1fs ,there won’t be any problem but if the precision is higher than that it won’t wait and it will work as 0 delay . So I want to write a code which will determine the timescale used by the user and give the delay accordingly.My expected pseudo-code will be like below,

Please help me with the logic to determine the timescale unit and precision internally.

system-verilog modelsim uvm system-verilog-dpi

0 投票

1 回答

279 浏览

verilog - System Verilog DPI Checker 屏蔽 128 位值

我正在编写一个 DPI 检查器（.cpp 文件），在此，检查器读取每一行的 128 位值，我想用 128 位掩码对其进行屏蔽并将其与 RTL 值进行比较，但我看到的问题是我从中创建掩码的数据类型仅包含 32 位值，我需要对原始数据进行按位与运算。任何人都可以提供任何建议吗？

这里svBitVecVal最多只能保存 32bit 的值。data_masked如果掩码超过 32 位，则不会显示正确的值。

verilog system-verilog monitor bitvector system-verilog-dpi

0 投票

2 回答

933 浏览

gcc - DPI-C and SystemVerilog External Compilation flow issue

ModelSim User's manual (v10.1c), in page 660, talks about the default autocompile flow (using vlog) and external compilation flow to get the the DPI-C to work in ModelSim. I'm able to get the auto-compile flow to work. I'm stuck with the external compilation flow.

Problem Summary: I get an "undefined reference" error in when I try to create the .dll file in-spite of using the right export and import statements in my system verilog file.

Here are the files that make up this project:

file 1: mytest.cpp

file 2: experiment3.h

file 3: mytb.sv

Here are the command that I am using:

Most of the online DPI-C examples deal with running (CPP and .SV) everything in ModelSim. I don't want that. I want to keep the HW and SW flow separate. And, this separation does work to some extent (I have no issues with calling C functions from SV (import works fine). The roadblock is with trying to call SystemVerilog function from the C function (something seems to be wrong with the export).

Any thoughts on how I can get past this hurdle ?

gcc system-verilog modelsim system-verilog-dpi

0 投票

1 回答

1359 浏览