1

What is the effect of configuring a pull mode on a pin designated as output in the synthesis?

Does the pull mode still take effect?

Is its use only apparent if we set the output to tristate?

See the example below with a Lattice Diamond tool, I am able to configure the pull mode for an output. enter image description here

4

1 回答 1

1

只有当引脚处于三态时，它才会对输出产生影响。如果您配置弱上拉，我认为如果您将输出驱动为低电平，它会消耗一些功率，反之亦然，用于弱下拉。

我更喜欢配置显式 IO 缓冲区以使三态控制显式，但这只是一种风格偏好。

于 2019-05-06T14:35:21.557 回答