我正在使用 Xilinx ISE 14.7,我想将 Microblaze IP 内核嵌入到我的 FPGA 中,但我无法让 IP 内核生成器在 Linux 上运行。
我让它在 Windows 7 上运行:一切正常,包括模拟!然后我在我的 PC 上安装了 Linux Mint 17.3,安装了 Xilinx ISE,设置了所有内容,但是当我生成 Microblaze IP 时,我收到一条奇怪的 Tcl 错误消息。FiFo IP的生成没有问题;生成器仅在 Microblaze 上失败。我的 PC CPU 是 64 位 Intel 双核。
控制台输出如下:
INFO:sim:172 - Generating IP...
Applying current project options...
Finished applying current project options.
WARNING:sim - Verilog simulation file type 'Behavioral' is not valid for this
core. Overriding with simulation file type 'Structural'.
WARNING:sim - A core named 'microblaze_mcs' already exists in the project.
Output products for this core may be overwritten.
Resolving generics for 'microblaze_mcs'...
WARNING:sim - Verilog simulation file type 'Behavioral' is not valid for this
core. Overriding with simulation file type 'Structural'.
WARNING:sim - A core named 'microblaze_mcs' already exists in the project.
Output products for this core may be overwritten.
Applying external generics to 'microblaze_mcs'...
Delivering associated files for 'microblaze_mcs'...
Generating implementation netlist for 'microblaze_mcs'...
INFO:sim - Pre-processing HDL files for 'microblaze_mcs'...
Running synthesis for 'microblaze_mcs'
Running ngcbuild...
INFO:sim - Running microblaze_mcs_gen_script.tcl
WARNING:coreutil - no files matched glob pattern "./_cg/*/system_template.tcl"
while executing "glob "./_cg/*/system_template.tcl""
(procedure "bmm_xml" line 244)
invoked from within
"bmm_xml $argc $argv"
invoked from within
"return [bmm_xml $argc $argv]"
(file "/opt/Xilinx/14.7/ISE_DS/ISE/coregen/ip/xilinx/primary/com/xilinx/ip/microblaze_mcs_v1_4/microblaze_mcs_gen_script.tcl" line 482)ERROR:sim - Unable to evaluate Tcl file:
/opt/Xilinx/14.7/ISE_DS/ISE/coregen/ip/xilinx/primary/com/xilinx/ip/microblaze_mcs_v1_4/microblaze_mcs_gen_script.tcl
ERROR:sim - Failed executing Tcl generator.
ERROR:sim - Failed to generate 'microblaze_mcs'. Failed executing Tcl
generator.
Wrote CGP file for project 'microblaze_mcs'.
Core Generator edit command failed.
谁可以帮我这个事?