1

我构建了 riscv-tools 和火箭芯片模拟器。当我运行 run-asm-tests 时，输出是一个空文件。似乎什么也没有发生。

ceez: riscv/rocket-chip/emulator (master *)-> make output/rv64ui-p-add.out
mkdir -p ./output
ln -fs /media/arun/Academics/phd/Bremen/works/Learnings/riscv/rocket-chip/riscv-tools/riscv-tests/isa/rv64ui-p-add.hex output/rv64ui-p-add.hex
./emulator-DefaultCPPConfig +dramsim +max-cycles=100000000 +verbose +loadmem=output/rv64ui-p-add.hex none 3>&1 1>&2 2>&3 | /media/arun/Academics/phd/Bremen/works/Learnings/riscv/riscv/bin/spike-dasm  > output/rv64ui-p-add.out && [ $PIPESTATUS -eq 0 ]

>ceez: riscv/rocket-chip/emulator (master *)-> cat output/rv64ui-p-add.out 
Dramsim2 init successful
Starting store transaction (addr=0 ; tag=19 ; cyc=5831)
Adding store transaction (addr=0; cyc=5835)
[Callback] write complete: id=0 , addr=0x0 , cycle=5862

如果我手动运行它并减少最大周期，这就是我得到的：

ceez: riscv/rocket-chip/emulator (master *)-> ./emulator-DefaultCPPConfig +dramsim +max-cycles=5000 +verbose +loadmem=output/rv64ui-p-add.hex
Dramsim2 init successful
*** FAILED *** (timeout, seed 1438106295) after 5000 cycles

笔记 ：：

1) 我在 mm_dramsim2.cc 中取消了宏#ifdef DEBUG_DRAMSIM2 的注释

2) chisel 编译器的模拟器生成流程中有一些警告。转载如下，以防万一。

cd /media/arun/Academics/phd/Bremen/works/Learnings/riscv/rocket-chip && java -Xmx2048M -Xss8M -XX:MaxPermSize=128M -jar sbt-launch.jar "project rocketchip" "run Top --W0W --noIoDebug --backend c --configInstance rocketchip.DefaultCPPConfig --compileInitializationUnoptimized --targetDir emulator/generated-src"
[0m[[0minfo[0m] [0mLoading project definition from /media/arun/Academics/phd/Bremen/works/Learnings/riscv/rocket-chip/project[0m
Using addons: 
[0m[[0minfo[0m] [0mSet current project to rocketchip (in build file:/media/arun/Academics/phd/Bremen/works/Learnings/riscv/rocket-chip/)[0m
[0m[[0minfo[0m] [0mSet current project to rocketchip (in build file:/media/arun/Academics/phd/Bremen/works/Learnings/riscv/rocket-chip/)[0m
[0m[[0minfo[0m] [0mRunning rocketchip.TestGenerator Top --W0W --noIoDebug --backend c --configInstance rocketchip.DefaultCPPConfig --compileInitializationUnoptimized --targetDir emulator/generated-src[0m
CPP elaborate
[[35minfo[0m] [6.096] // COMPILING < (class rocketchip.Top)>(2)
[[35minfo[0m] [6.356] giving names
[[35minfo[0m] [6.580] executing custom transforms
[[35minfo[0m] [6.581] adding clocks and resets
[[35minfo[0m] [6.709] inferring widths
[[35minfo[0m] [7.082] eliminating W0W
[[35minfo[0m] [7.275] checking widths
[[35minfo[0m] [7.377] lowering complex nodes to primitives
[[35minfo[0m] [7.378] removing type nodes
[[35minfo[0m] [7.485] compiling 39307 nodes
[[35minfo[0m] [7.485] computing memory ports
[[35minfo[0m] [7.546] resolving nodes to the components
[[35minfo[0m] [7.914] creating clock domains
[[35minfo[0m] [7.941] pruning unconnected IOs
[[35minfo[0m] [7.962] checking for combinational loops
[[35minfo[0m] [8.072] NO COMBINATIONAL LOOP FOUND
[[35minfo[0m] [8.369] populating clock domains
CppBackend::elaborate: need 501, redundant 425 shadow registers
[[35minfo[0m] [9.322] generating cpp files
CppBackend: createCppFile Top.DefaultCPPConfig-0.cpp
CppBackend: createCppFile Top.DefaultCPPConfig-1.cpp
CppBackend: createCppFile Top.DefaultCPPConfig-2.cpp
CppBackend: createCppFile Top.DefaultCPPConfig-3.cpp
[[33mwarn[0m] tilelink.scala:935: UNABLE TO FIND client_id IN <ManagerTileLinkNetworkPort (class uncore.ManagerTileLinkNetworkPort)> in class uncore.ManagerTileLinkNetworkPort
[[33mwarn[0m] tilelink.scala:937: UNABLE TO FIND client_id IN <ManagerTileLinkNetworkPort (class uncore.ManagerTileLinkNetworkPort)> in class uncore.ManagerTileLinkNetworkPort
[[33mwarn[0m] tilelink.scala:935: UNABLE TO FIND client_id IN <ManagerTileLinkNetworkPort (class uncore.ManagerTileLinkNetworkPort)> in class uncore.ManagerTileLinkNetworkPort
[[33mwarn[0m] tilelink.scala:937: UNABLE TO FIND client_id IN <ManagerTileLinkNetworkPort (class uncore.ManagerTileLinkNetworkPort)> in class uncore.ManagerTileLinkNetworkPort
[[33mwarn[0m] nbdcache.scala:376: UNABLE TO FIND data IN <replay_arb (class Chisel.Arbiter)> in class rocket.MSHRFile
[[33mwarn[0m] cache.scala:153: Mux of Bits instantiated, emits SInt in class uncore.MetadataArray
[[33mwarn[0m] nbdcache.scala:817: UNABLE TO FIND tag IN <metaReadArb (class Chisel.Arbiter)> in class rocket.HellaCache
[[33mwarn[0m] nbdcache.scala:839: UNABLE TO FIND tag IN <metaReadArb (class Chisel.Arbiter)> in class rocket.HellaCache
[[33mwarn[0m] dpath.scala:171: UNABLE TO FIND custom_mrw_csrs IN <dpath (class rocket.Datapath)> in class rocket.Datapath
[[33mwarn[0m] dpath.scala:171: UNABLE TO FIND evec IN <dpath (class rocket.Datapath)> in class rocket.Datapath
[[33mwarn[0m] dpath.scala:171: UNABLE TO FIND fatc IN <dpath (class rocket.Datapath)> in class rocket.Datapath
[[33mwarn[0m] dpath.scala:171: UNABLE TO FIND fcsr_flags IN <dpath (class rocket.Datapath)> in class rocket.Datapath
[[33mwarn[0m] dpath.scala:171: UNABLE TO FIND fcsr_rm IN <dpath (class rocket.Datapath)> in class rocket.Datapath
[[33mwarn[0m] dpath.scala:171: UNABLE TO FIND host IN <dpath (class rocket.Datapath)> in class rocket.Datapath
[[33mwarn[0m] dpath.scala:171: UNABLE TO FIND pc IN <dpath (class rocket.Datapath)> in class rocket.Datapath
[[33mwarn[0m] dpath.scala:171: UNABLE TO FIND ptbr IN <dpath (class rocket.Datapath)> in class rocket.Datapath
[[33mwarn[0m] dpath.scala:171: UNABLE TO FIND rocc IN <dpath (class rocket.Datapath)> in class rocket.Datapath
[[33mwarn[0m] dpath.scala:171: UNABLE TO FIND rw IN <dpath (class rocket.Datapath)> in class rocket.Datapath
[[33mwarn[0m] dpath.scala:171: UNABLE TO FIND time IN <dpath (class rocket.Datapath)> in class rocket.Datapath
[[33mwarn[0m] dpath.scala:171: UNABLE TO FIND uarch_counters IN <dpath (class rocket.Datapath)> in class rocket.Datapath
[[33mwarn[0m] dpath.scala:172: UNABLE TO FIND cause IN <dpath (class rocket.Datapath)> in class rocket.Datapath
[[33mwarn[0m] dpath.scala:172: UNABLE TO FIND csr_replay IN <dpath (class rocket.Datapath)> in class rocket.Datapath
[[33mwarn[0m] dpath.scala:172: UNABLE TO FIND csr_stall IN <dpath (class rocket.Datapath)> in class rocket.Datapath
[[33mwarn[0m] dpath.scala:172: UNABLE TO FIND csr_xcpt IN <dpath (class rocket.Datapath)> in class rocket.Datapath
[[33mwarn[0m] dpath.scala:172: UNABLE TO FIND custom_mrw_csrs IN <dpath (class rocket.Datapath)> in class rocket.Datapath
[[33mwarn[0m] dpath.scala:172: UNABLE TO FIND eret IN <dpath (class rocket.Datapath)> in class rocket.Datapath
[[33mwarn[0m] dpath.scala:172: UNABLE TO FIND evec IN <dpath (class rocket.Datapath)> in class rocket.Datapath
[[33mwarn[0m] dpath.scala:172: UNABLE TO FIND exception IN <dpath (class rocket.Datapath)> in class rocket.Datapath
[[33mwarn[0m] dpath.scala:172: UNABLE TO FIND fatc IN <dpath (class rocket.Datapath)> in class rocket.Datapath
[[33mwarn[0m] dpath.scala:172: UNABLE TO FIND host IN <dpath (class rocket.Datapath)> in class rocket.Datapath
[[33mwarn[0m] dpath.scala:172: UNABLE TO FIND interrupt IN <dpath (class rocket.Datapath)> in class rocket.Datapath
[[33mwarn[0m] dpath.scala:172: UNABLE TO FIND interrupt_cause IN <dpath (class rocket.Datapath)> in class rocket.Datapath
[[33mwarn[0m] dpath.scala:172: UNABLE TO FIND pc IN <dpath (class rocket.Datapath)> in class rocket.Datapath
[[33mwarn[0m] dpath.scala:172: UNABLE TO FIND ptbr IN <dpath (class rocket.Datapath)> in class rocket.Datapath
[[33mwarn[0m] dpath.scala:172: UNABLE TO FIND retire IN <dpath (class rocket.Datapath)> in class rocket.Datapath
[[33mwarn[0m] dpath.scala:172: UNABLE TO FIND rocc IN <dpath (class rocket.Datapath)> in class rocket.Datapath
[[33mwarn[0m] dpath.scala:172: UNABLE TO FIND rw IN <dpath (class rocket.Datapath)> in class rocket.Datapath
[[33mwarn[0m] dpath.scala:172: UNABLE TO FIND status IN <dpath (class rocket.Datapath)> in class rocket.Datapath
[[33mwarn[0m] dpath.scala:172: UNABLE TO FIND time IN <dpath (class rocket.Datapath)> in class rocket.Datapath
[[33mwarn[0m] dpath.scala:172: UNABLE TO FIND uarch_counters IN <dpath (class rocket.Datapath)> in class rocket.Datapath
[[33mwarn[0m] dpath.scala:232: Mux of Bits instantiated, emits SInt in class rocket.Datapath
[[33mwarn[0m] dpath.scala:236: Mux of Bits instantiated, emits SInt in class rocket.Datapath
[[33mwarn[0m] Testing.scala:124: Width.op- setting width to Width(0): 1 < 10 in class rocketchip.TestGenerator$delayedInit$body
[0m[[32msuccess[0m] [0mTotal time: 13 s, completed Jul 28, 2015 4:34:00 PM[0m
g++ -O1 -std=c++11 -I/media/arun/Academics/phd/Bremen/works/Learnings/riscv/rocket-chip/toolchain/include -I/media/arun/Academics/phd/Bremen/works/Learnings/riscv/rocket-chip/csrc -I/media/arun/Academics/phd/Bremen/works/Learnings/riscv/rocket-chip/dramsim2 -include generated-src/Top.DefaultCPPConfig.h -Igenerated-src -c -o emulator.o /media/arun/Academics/phd/Bremen/works/Learnings/riscv/rocket-chip/csrc/emulator.cc
g++ -O1 -std=c++11 -I/media/arun/Academics/phd/Bremen/works/Learnings/riscv/rocket-chip/toolchain/include -I/media/arun/Academics/phd/Bremen/works/Learnings/riscv/rocket-chip/csrc -I/media/arun/Academics/phd/Bremen/works/Learnings/riscv/rocket-chip/dramsim2 -include generated-src/Top.DefaultCPPConfig.h -Igenerated-src -c -o mm.o /media/arun/Academics/phd/Bremen/works/Learnings/riscv/rocket-chip/csrc/mm.cc
g++ -O1 -std=c++11 -I/media/arun/Academics/phd/Bremen/works/Learnings/riscv/rocket-chip/toolchain/include -I/media/arun/Academics/phd/Bremen/works/Learnings/riscv/rocket-chip/csrc -I/media/arun/Academics/phd/Bremen/works/Learnings/riscv/rocket-chip/dramsim2 -include generated-src/Top.DefaultCPPConfig.h -Igenerated-src -c -o mm_dramsim2.o /media/arun/Academics/phd/Bremen/works/Learnings/riscv/rocket-chip/csrc/mm_dramsim2.cc
make -j generated-src/Top.DefaultCPPConfig-0.o generated-src/Top.DefaultCPPConfig-1.o generated-src/Top.DefaultCPPConfig-2.o generated-src/Top.DefaultCPPConfig-3.o
make[1]: Entering directory '/media/arun/Academics/phd/Bremen/works/Learnings/riscv/rocket-chip/emulator'
g++ -O1 -std=c++11 -I/media/arun/Academics/phd/Bremen/works/Learnings/riscv/rocket-chip/toolchain/include -I/media/arun/Academics/phd/Bremen/works/Learnings/riscv/rocket-chip/csrc -I/media/arun/Academics/phd/Bremen/works/Learnings/riscv/rocket-chip/dramsim2 -Igenerated-src -c -o generated-src/Top.DefaultCPPConfig-0.o generated-src/Top.DefaultCPPConfig-0.cpp
g++ -O1 -std=c++11 -I/media/arun/Academics/phd/Bremen/works/Learnings/riscv/rocket-chip/toolchain/include -I/media/arun/Academics/phd/Bremen/works/Learnings/riscv/rocket-chip/csrc -I/media/arun/Academics/phd/Bremen/works/Learnings/riscv/rocket-chip/dramsim2 -Igenerated-src -c -o generated-src/Top.DefaultCPPConfig-1.o generated-src/Top.DefaultCPPConfig-1.cpp
g++ -O1 -std=c++11 -I/media/arun/Academics/phd/Bremen/works/Learnings/riscv/rocket-chip/toolchain/include -I/media/arun/Academics/phd/Bremen/works/Learnings/riscv/rocket-chip/csrc -I/media/arun/Academics/phd/Bremen/works/Learnings/riscv/rocket-chip/dramsim2 -Igenerated-src -c -o generated-src/Top.DefaultCPPConfig-2.o generated-src/Top.DefaultCPPConfig-2.cpp
g++ -O1 -std=c++11 -I/media/arun/Academics/phd/Bremen/works/Learnings/riscv/rocket-chip/toolchain/include -I/media/arun/Academics/phd/Bremen/works/Learnings/riscv/rocket-chip/csrc -I/media/arun/Academics/phd/Bremen/works/Learnings/riscv/rocket-chip/dramsim2 -Igenerated-src -c -o generated-src/Top.DefaultCPPConfig-3.o generated-src/Top.DefaultCPPConfig-3.cpp
make[1]: Leaving directory '/media/arun/Academics/phd/Bremen/works/Learnings/riscv/rocket-chip/emulator'
ld -r generated-src/Top.DefaultCPPConfig-0.o generated-src/Top.DefaultCPPConfig-1.o generated-src/Top.DefaultCPPConfig-2.o generated-src/Top.DefaultCPPConfig-3.o -o Top.DefaultCPPConfig.o
ar rcs libdramsim.a /media/arun/Academics/phd/Bremen/works/Learnings/riscv/rocket-chip/dramsim2/AddressMapping.o /media/arun/Academics/phd/Bremen/works/Learnings/riscv/rocket-chip/dramsim2/Transaction.o /media/arun/Academics/phd/Bremen/works/Learnings/riscv/rocket-chip/dramsim2/BusPacket.o /media/arun/Academics/phd/Bremen/works/Learnings/riscv/rocket-chip/dramsim2/BankState.o /media/arun/Academics/phd/Bremen/works/Learnings/riscv/rocket-chip/dramsim2/MemorySystem.o /media/arun/Academics/phd/Bremen/works/Learnings/riscv/rocket-chip/dramsim2/SimulatorObject.o /media/arun/Academics/phd/Bremen/works/Learnings/riscv/rocket-chip/dramsim2/TraceBasedSim.o /media/arun/Academics/phd/Bremen/works/Learnings/riscv/rocket-chip/dramsim2/Bank.o /media/arun/Academics/phd/Bremen/works/Learnings/riscv/rocket-chip/dramsim2/CommandQueue.o /media/arun/Academics/phd/Bremen/works/Learnings/riscv/rocket-chip/dramsim2/Rank.o /media/arun/Academics/phd/Bremen/works/Learnings/riscv/rocket-chip/dramsim2/MemoryController.o /media/arun/Academics/phd/Bremen/works/Learnings/riscv/rocket-chip/dramsim2/MultiChannelMemorySystem.o /media/arun/Academics/phd/Bremen/works/Learnings/riscv/rocket-chip/dramsim2/IniReader.o
g++ -O1 -std=c++11 -I/media/arun/Academics/phd/Bremen/works/Learnings/riscv/rocket-chip/toolchain/include -I/media/arun/Academics/phd/Bremen/works/Learnings/riscv/rocket-chip/csrc -I/media/arun/Academics/phd/Bremen/works/Learnings/riscv/rocket-chip/dramsim2 -o emulator-DefaultCPPConfig emulator.o mm.o mm_dramsim2.o Top.DefaultCPPConfig.o  -L/media/arun/Academics/phd/Bremen/works/Learnings/riscv/rocket-chip/toolchain/lib -Wl,-rpath,/media/arun/Academics/phd/Bremen/works/Learnings/riscv/rocket-chip/toolchain/lib -L. -ldramsim -lfesvr -lpthread

3）这是我在堆栈溢出中的第一篇文章，此外我对 chisel/riscv 很陌生。请原谅明显的错误，如果有的话！

4

2 回答 2

0

“我构建了 riscv 工具和火箭芯片仿真器。”

RISC-V 工具仍在积极开发中，因此您必须非常小心，为您签出的 Rocket-chip 编译正确的版本。Rocket-chip 超级仓库将正确版本的 riscv-tools 指向为 git 子模块。

cd rocket-chip/riscv-tools; ./build.sh

这应该构建 Rocket 使用的正确版本的 RISC-V 工具。

如果您想更好地调试 Rocket 处理器，您应该分析生成的输出文件：(rocket-chip/emulator/output/rv64ui-p-add.out)。我假设发生的情况是，您的add测试是使用不正确的特权 ISA 版本编译的，这导致发生非法指令异常。但是，由于简单的汇编测试没有设置 EVEC（异常向量），因此处理器会跳转到代码中的随机位置以处理驻留在 EVEC 位置的非法指令上的异常和无限循环。

于 2015-07-28T23:54:04.113 回答
0

@Chris - 感谢您的建议。

我可以在 Fedora/Bash 组合中构建和运行模拟器。
我通常使用 ArchLinux/Zsh，最初的错误是在这个组合中。

以下可能是 Arch 中会发生的事情：
1) 检查了火箭芯片并更新了教程本身中给出的 git 子模块，并尝试首先构建 riscv-tools。但是，在 QEMU 阶段的 make 流程中存在错误。（转载如下）

...
Makefile:1406: warning: overriding recipe for target 'lib_a-mbtowc_r.o'
Makefile:761: warning: ignoring old recipe for target 'lib_a-mbtowc_r.o'
Makefile:1608: warning: overriding recipe for target 'lib_a-vfwscanf.o'
Makefile:1348: warning: ignoring old recipe for target 'lib_a-vfwscanf.o'
Makefile:1608: warning: overriding recipe for target 'lib_a-vfwscanf.o'
Makefile:1348: warning: ignoring old recipe for target 'lib_a-vfwscanf.o'
install-info: /media/arun/Academics/phd/Bremen/works/Learnings/arch-rocket-chip/rocket-chip/riscv/share/info/dir: empty file
gmake[3]: [/media/arun/Academics/phd/Bremen/works/Learnings/arch-rocket-chip/rocket-chip/riscv/share/info/gcc.info] Error 1 (ignored)
install-info: /media/arun/Academics/phd/Bremen/works/Learnings/arch-rocket-chip/rocket-chip/riscv/share/info/dir: empty file
gmake[3]: [/media/arun/Academics/phd/Bremen/works/Learnings/arch-rocket-chip/rocket-chip/riscv/share/info/cppinternals.info] Error 1 (ignored)
Makefile:1406: warning: overriding recipe for target 'lib_a-mbtowc_r.o'
Makefile:761: warning: ignoring old recipe for target 'lib_a-mbtowc_r.o'
Makefile:1406: warning: overriding recipe for target 'lib_a-mbtowc_r.o'
Makefile:761: warning: ignoring old recipe for target 'lib_a-mbtowc_r.o'
Makefile:1608: warning: overriding recipe for target 'lib_a-vfwscanf.o'
Makefile:1348: warning: ignoring old recipe for target 'lib_a-vfwscanf.o'
Makefile:1608: warning: overriding recipe for target 'lib_a-vfwscanf.o'
Makefile:1348: warning: ignoring old recipe for target 'lib_a-vfwscanf.o'
Makefile:1406: warning: overriding recipe for target 'lib_a-mbtowc_r.o'
Makefile:761: warning: ignoring old recipe for target 'lib_a-mbtowc_r.o'
Makefile:1406: warning: overriding recipe for target 'lib_a-mbtowc_r.o'
Makefile:761: warning: ignoring old recipe for target 'lib_a-mbtowc_r.o'
Makefile:1608: warning: overriding recipe for target 'lib_a-vfwscanf.o'
Makefile:1348: warning: ignoring old recipe for target 'lib_a-vfwscanf.o'
Makefile:1608: warning: overriding recipe for target 'lib_a-vfwscanf.o'
Makefile:1348: warning: ignoring old recipe for target 'lib_a-vfwscanf.o'
Installing project riscv-gnu-toolchain

Configuring project riscv-pk
configure: WARNING: using cross tools not prefixed with host triplet
Building project riscv-pk
Installing project riscv-pk
mkdir //media/arun/Academics/phd/Bremen/works/Learnings/arch-rocket-chip/rocket-chip/riscv/riscv64-unknown-elf/lib/riscv-pk
mkdir //media/arun/Academics/phd/Bremen/works/Learnings/arch-rocket-chip/rocket-chip/riscv/riscv64-unknown-elf/include/riscv-pk

Configuring project riscv-qemu
ceez: arch-rocket-chip/rocket-chip/riscv-tools ((ce9bb22...))-> 
ceez: arch-rocket-chip/rocket-chip/riscv-tools ((ce9bb22...))->

但是当我检查 $RISCV/bin 目录时，需要的 binutils、spike 等都在那里。
唯一缺少的东西是构建测试。
2）然后我检查了一个新的独立版本的 riscv-tools 并重新开始。在制作流程中也报告了错误。
3）此时，我开始进一步调试，并在 riscv-tests 目录中手动构建了一些 hex 文件（使用此独立版本的 riscv-tools）。
4）并使用这些十六进制文件运行火箭芯片仿真器。结果是“rocket-chip/emulator/output/rv64ui-p-add.out”的空文件。

正如您所提到的，这可能是 riscv-tools 和 checkout 火箭芯片版本之间的不匹配。

于 2015-07-29T15:08:35.810 回答