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我正在尝试构建rocketchip和vsim，与此处描述的相同

但是我在执行以下操作时卡在了 vsim 运行：

koushik@koushik-Presario-CQ43-Notebook-PC:~/riscv_ks/rocket-chip/vsim$ make -j2 run
mkdir -p ./output
cd . && \
rm -rf csrc && \
vcs -full64 -notice -line +lint=all,noVCDE,noONGS,noUI -error=PCWM-L -timescale=1ns/10ps -quiet +rad +v2k +vcs+lic+wait +vc+list -CC "-I/include" -CC "-I/home/koushik/riscvtools/include" -CC "-std=c++11" -CC "-Wl,-rpath,/home/koushik/riscvtools/lib" /home/koushik/riscvtools/lib/libfesvr.so -sverilog +incdir+/home/koushik/riscv_ks/rocket-chip/vsim/generated-src +define+CLOCK_PERIOD=1.0 /home/koushik/riscv_ks/rocket-chip/vsim/generated-src/freechips.rocketchip.system.DefaultConfig.v /home/koushik/riscv_ks/rocket-chip/vsim/generated-src/freechips.rocketchip.system.DefaultConfig.behav_srams.v /home/koushik/riscv_ks/rocket-chip/src/main/resources/vsrc/TestDriver.v /home/koushik/riscv_ks/rocket-chip/src/main/resources/vsrc/SimDTM.v /home/koushik/riscv_ks/rocket-chip/src/main/resources/vsrc/SimJTAG.v /home/koushik/riscv_ks/rocket-chip/src/main/resources/vsrc/plusarg_reader.v /home/koushik/riscv_ks/rocket-chip/src/main/resources/vsrc/ClockDivider2.v /home/koushik/riscv_ks/rocket-chip/src/main/resources/vsrc/ClockDivider3.v /home/koushik/riscv_ks/rocket-chip/src/main/resources/vsrc/AsyncResetReg.v /home/koushik/riscv_ks/rocket-chip/src/main/resources/vsrc/EICG_wrapper.v  /home/koushik/riscv_ks/rocket-chip/src/main/resources/csrc/SimDTM.cc /home/koushik/riscv_ks/rocket-chip/src/main/resources/csrc/SimJTAG.cc /home/koushik/riscv_ks/rocket-chip/src/main/resources/csrc/remote_bitbang.cc +define+PRINTF_COND=TestDriver.printf_cond +define+STOP_COND=!TestDriver.reset +define+RANDOMIZE_MEM_INIT +define+RANDOMIZE_REG_INIT +define+RANDOMIZE_GARBAGE_ASSIGN +define+RANDOMIZE_INVALID_ASSIGN +define+RANDOMIZE_DELAY=2 +libext+.v  -o ./simv-freechips.rocketchip.system-DefaultConfig \
-debug_pp \

ln -fs /home/koushik/riscvtools/riscv64-unknown-elf/share/riscv-tests/isa/rv64um-v-mul output/rv64um-v-mul
/bin/bash: line 2: vcs: command not found
Makefrag:68: recipe for target 'simv-freechips.rocketchip.system-DefaultConfig' failed
make: *** [simv-freechips.rocketchip.system-DefaultConfig] Error 127
make: *** Waiting for unfinished jobs....
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1 回答 1

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您没有安装 VCS，因此无法找到运行它的命令。尝试“make verilog”，这应该创建了rocket-chip的默认配置。或者，如果您想在Config.scala中创建其他固定配置之一，则可以使用“make CONFIG=TinyConfig verilog”，其中 TinyConfig 可以替换为任何固定配置。

谢谢， 夏兰

于 2019-04-24T14:03:58.817 回答