对于我们的学校项目,我正在尝试使用线性反馈移位寄存器在硬件(七段)上生成伪随机数。我已经编写了 LFSR 和七段模块,但是我无法将这两个模块相互连接。该项目综合,但 HDL 图没有显示 LFSR 和七段模块之间的任何连接。下面是代码。
//main module
module expo(input clock, reset,
output a,b,c,d,e,f,g
);
wire [3:0]connect, clk, a,b,c,d,e,f,g;
LFSR_4_bit lfsr(
.clock(clock),
.LFSR(connect)
);
seven_seg seven(
.in(connect),
.reset(reset),
.a(a),
.b(b),
.c(c),
.d(d),
.e(e),
.f(f),
.g(g)
);
endmodule
//LFSR module
module LFSR_4_bit(
input clock,
output reg[3:0]LFSR = 15
);
wire feedback = LFSR[4];
always @(posedge clock)
begin
LFSR[0] <= feedback;
LFSR[1] <= LFSR[0];
LFSR[2] <= LFSR[1];
LFSR[3] <= LFSR[2] ^ feedback;
LFSR[4] <= LFSR[3];
end
endmodule
//input and output for seven seg module
module sevenseg(
input reset,
input[3:0] in, //the 4 inputs for each display
output a, b, c, d, e, f, g, //the individual LED output for the seven segment along with the digital point
output [3:0] an // the 4 bit enable signal
);
谢谢您的帮助。