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我们开发使用 Si5340 为各种芯片（ADC、DAC）提供时钟的硬件。

硬件基于 Xilinx Zynq Ultrascale，选择的操作系统是 Petalinux 2018.3。

我们使用的驱动程序是 clk-5341 ( https://github.com/torvalds/linux/blob/master/Documentation/devicetree/bindings/clock/silabs,si5341.txt )。

时钟芯片的文档提供了两个如何使用输出的片段。

some-video-node {
    /* Standard clock bindings */
    clock-names = "pixel";
    clocks = <&si5341 0 7>; /* Output 7 */

    /* Set output 7 to use syntesizer 3 as its parent */
    assigned-clocks = <&si5341 0 7>, <&si5341 1 3>;
    assigned-clock-parents = <&si5341 1 3>;
    /* Set output 7 to 148.5 MHz using a synth frequency of 594 MHz */
    assigned-clock-rates = <148500000>, <594000000>;
};

some-audio-node {
    clock-names = "i2s-clk";
    clocks = <&si5341 0 0>;
    /*
     * since output 0 is a synth-master, the synth will be automatically set
     * to an appropriate frequency when the audio driver requests another
     * frequency. We give control over synth 2 to this output here.
     */
    assigned-clocks = <&si5341 0 0>;
    assigned-clock-parents = <&si5341 1 2>;
};

使用了 si5340 的两个输出：

  • 1 GHz 用于 ADC 芯片
  • 250 MHz 用于 DAC 芯片

我想创建两个时钟节点来描述时钟输出，然后在 ADC 和 DAC 芯片节点中引用它们。

the_adc_clock: silabs-clock {
    compatible = "fixed-clock"

    /* Standard clock bindings */
    clock-names = "silabs-out-1";
    clocks = <&si5340 0 1>; /* Output 1 */

    clock-output-names = "the-adc-clock";

    /* Set output 1 to use syntesizer 3 as its parent */
    assigned-clocks = <&si5340 0 1>, <&si5340 1 3>;
    /* Set output 1 to 148.5 MHz using a synth frequency of 594 MHz */
    assigned-clock-rates = <148500000>, <594000000>;

    assigned-clock-parents = <&si5340 1 3>;
};

hmcad1510: the-hmcad1520@1 {
    compatible = "adi,hmcad1520";
    reg = <1>;
    clocks = <&the_adc_clock>;
};

这不能按预期工作。我对设备树很陌生。不幸的是，我没有找到一个有用的例子。

您能否建议如何正确地将 si5340 的输出描述为时钟源？

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