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我正在学习凿子和火箭芯片。我最近在 Rocket/RocketCore.scala 文件中发现了一个不可读的语法。

val perfEvents = new EventSets(Seq(
new EventSet((mask, hits) => Mux(mask(0), wb_xcpt, wb_valid && pipelineIDToWB((mask & hits).orR)), Seq(
  ("exception", () => false.B),
  ("load", () => id_ctrl.mem && id_ctrl.mem_cmd === M_XRD && !id_ctrl.fp),
  ("store", () => id_ctrl.mem && id_ctrl.mem_cmd === M_XWR && !id_ctrl.fp),
  ("amo", () => Bool(usingAtomics) && id_ctrl.mem && (isAMO(id_ctrl.mem_cmd) || id_ctrl.mem_cmd.isOneOf(M_XLR, M_XSC))),
  ("system", () => id_ctrl.csr =/= CSR.N),
  ("arith", () => id_ctrl.wxd && !(id_ctrl.jal || id_ctrl.jalr || id_ctrl.mem || id_ctrl.fp || id_ctrl.mul || id_ctrl.div || id_ctrl.csr =/= CSR.N)),
  ("branch", () => id_ctrl.branch),
  ("jal", () => id_ctrl.jal),
  ("jalr", () => id_ctrl.jalr))
  ++ (if (!usingMulDiv) Seq() else Seq(
    ("mul", () => if (pipelinedMul) id_ctrl.mul else id_ctrl.div && (id_ctrl.alu_fn & ALU.FN_DIV) =/= ALU.FN_DIV),
    ("div", () => if (pipelinedMul) id_ctrl.div else id_ctrl.div && (id_ctrl.alu_fn & ALU.FN_DIV) === ALU.FN_DIV)))
  ++ (if (!usingFPU) Seq() else Seq(
    ("fp load", () => id_ctrl.fp && io.fpu.dec.ldst && io.fpu.dec.wen),
    ("fp store", () => id_ctrl.fp && io.fpu.dec.ldst && !io.fpu.dec.wen),
    ("fp add", () => id_ctrl.fp && io.fpu.dec.fma && io.fpu.dec.swap23),
    ("fp mul", () => id_ctrl.fp && io.fpu.dec.fma && !io.fpu.dec.swap23 && !io.fpu.dec.ren3),
    ("fp mul-add", () => id_ctrl.fp && io.fpu.dec.fma && io.fpu.dec.ren3),
    ("fp div/sqrt", () => id_ctrl.fp && (io.fpu.dec.div || io.fpu.dec.sqrt)),
    ("fp other", () => id_ctrl.fp && !(io.fpu.dec.ldst || io.fpu.dec.fma || io.fpu.dec.div || io.fpu.dec.sqrt))))),
new EventSet((mask, hits) => (mask & hits).orR, Seq(
  ("load-use interlock", () => id_ex_hazard && ex_ctrl.mem || id_mem_hazard && mem_ctrl.mem || id_wb_hazard && wb_ctrl.mem),
  ("long-latency interlock", () => id_sboard_hazard),
  ("csr interlock", () => id_ex_hazard && ex_ctrl.csr =/= CSR.N || id_mem_hazard && mem_ctrl.csr =/= CSR.N || id_wb_hazard && wb_ctrl.csr =/= CSR.N),
  ("I$ blocked", () => icache_blocked),
  ("D$ blocked", () => id_ctrl.mem && dcache_blocked),
  ("branch misprediction", () => take_pc_mem && mem_direction_misprediction),
  ("control-flow target misprediction", () => take_pc_mem && mem_misprediction && mem_cfi && !mem_direction_misprediction && !icache_blocked),
  ("flush", () => wb_reg_flush_pipe),
  ("replay", () => replay_wb))
  ++ (if (!usingMulDiv) Seq() else Seq(
    ("mul/div interlock", () => id_ex_hazard && (ex_ctrl.mul || ex_ctrl.div) || id_mem_hazard && (mem_ctrl.mul || mem_ctrl.div) || id_wb_hazard && wb_ctrl.div)))
  ++ (if (!usingFPU) Seq() else Seq(
    ("fp interlock", () => id_ex_hazard && ex_ctrl.fp || id_mem_hazard && mem_ctrl.fp || id_wb_hazard && wb_ctrl.fp || id_ctrl.fp && id_stall_fpu)))),
new EventSet((mask, hits) => (mask & hits).orR, Seq(
  ("I$ miss", () => io.imem.perf.acquire),
  ("D$ miss", () => io.dmem.perf.acquire),
  ("D$ release", () => io.dmem.perf.release),
  ("ITLB miss", () => io.imem.perf.tlbMiss),
  ("DTLB miss", () => io.dmem.perf.tlbMiss),
  ("L2 TLB miss", () => io.ptw.perf.l2miss)))))

使用类EventSet时，没有找到mask和hits的定义。

4

2 回答 2

2

这是一段相当吓人的代码。打破它

  • perfEvents被分配为一个实例EventSets
  • EventSets需要一个参数
    • class EventSets(val eventSets: Seq[EventSet])
    • 所以你会看到一个SeqbeginEventSet创建。
  • EventSet需要两个参数
    • class EventSet(gate: (UInt, UInt) => Bool, events: Seq[(String, () => Bool)])
    • 第一：一个二的函数UInts，返回一个Bool
    • 第二：A Seqof 2 tuple ofString和一个没有参数的函数返回一个Bool
    • 所以你会看到这些元组的长序列被定义。
    • 注意：需要的顺序(String, () => Bool())取决于配置参数，例如usingMulDiv
      • ++ (if (..因此，您会多次看到该构造。
      • 这使用if有条件地将元组的不同子序列添加到EventSet它正在构造的参数中。

我希望这会有所帮助。这是一大堆东西，可能会变得丑陋而简短，或者更清晰，而且非常冗长。通过格式化程序运行它可能会有所帮助。这里有一点。

val perfEvents = new EventSets(
  Seq(
    new EventSet(
      (mask, hits) => Mux(wb_xcpt, mask(0), wb_valid && pipelineIDToWB((mask & hits).orR)),
      Seq(
        ("exception", () => false.B),
        ("load", () => id_ctrl.mem && id_ctrl.mem_cmd === M_XRD && !id_ctrl.fp),
        ("store", () => id_ctrl.mem && id_ctrl.mem_cmd === M_XWR && !id_ctrl.fp),
        ("amo",
         () =>
           Bool(usingAtomics) && id_ctrl.mem && (isAMO(id_ctrl.mem_cmd) || id_ctrl.mem_cmd.isOneOf(M_XLR, M_XSC))),
        ("system", () => id_ctrl.csr =/= CSR.N),
        ("arith",
         () =>
           id_ctrl.wxd && !(id_ctrl.jal || id_ctrl.jalr || id_ctrl.mem || id_ctrl.fp || id_ctrl.mul || id_ctrl.div || id_ctrl.csr =/= CSR.N)),
        ("branch", () => id_ctrl.branch),
        ("jal", () => id_ctrl.jal),
        ("jalr", () => id_ctrl.jalr)
      )
        ++ (if (!usingMulDiv) Seq()
            else
              Seq(
于 2019-12-17T17:34:40.397 回答
1

mask并且hits只是传递给EventSet构造函数的 lambda 的参数，(mask, hits) => ...部分是它们的定义（或声明，如果您愿意）。如果您查看EventSet源代码，您可以看到 lambdagate仅在此方法中被调用和使用：

def check(mask: UInt) = gate(mask, hits)

和来自mask的论点也是如此checkhits

def hits = events.map(_._2()).asUInt

在这种情况下，首先EventSet你会得到类似的东西

Seq(
  false.B,
  id_ctrl.mem && id_ctrl.mem_cmd === M_XRD && !id_ctrl.fp,
  ...
).asUInt
于 2019-12-17T17:23:39.453 回答