我正在学习 VHDL,我正在尝试从示例、语法指南和实验中学习。
我不太明白的一件事是为什么您要提供不止一种架构。例如,这个示例 MUX 代码:
architecture behv1 of Mux is
begin
process(I3,I2,I1,I0,S)
begin
-- use case statement
case S is
when "00" => O <= I0;
when "01" => O <= I1;
when "10" => O <= I2;
when "11" => O <= I3;
when others => O <= "ZZZ";
end case;
end process;
end behv1;
architecture behv2 of Mux is
begin
-- use when.. else statement
O <= I0 when S="00" else
I1 when S="01" else
I2 when S="10" else
I3 when S="11" else
"ZZZ";
end behv2;
它是有目的的,还是只是为了举例?
另外,不确定这是属于这里还是属于 Electronics.SE,所以我想先在这里尝试。