4

我遇到了在 qemu-kvm 上捕获性能监控中断(PMI - 特别是指令计数器)的情况。下面的代码在真机(Intel Core TM i5-4300U)上运行良好,但在 qemu-kvm(qemu-system-x86_64 -cpu 主机)上,我什至看不到一个 PMI。虽然计数器工作正常。我可以很好地检查它的增量。

但是,我已经用 Linux 内核进行了测试,它在同一个 qemu-kvm 上很好地捕获了溢出中断。因此,在 Qemu-kvm 上配置性能监控计数器时,我显然缺少了一个步骤。

有人可以向我指出吗?这是伪代码:

#define LAPIC_SVR           0xF0
#define LAPIC_LVT_PERFM      0x340,
#define CPU_LOCAL_APIC      0xFFFFFFFFBFFFE000
#define NMI_DELIVERY_MODE    0x4 << 8                            //NMI
#define MSR_PERF_GLOBAL_CTRL    0x38F
#define MSR_PERF_FIXED_CTRL     0x38D
#define MSR_PERF_FIXED_CTR0     0x309
#define MSR_PERF_GLOBAL_OVF_CTRL 0x390

/*Configure LAPIC*/
apic_base = Msr::read<Paddr>(Msr::IA32_APIC_BASE)
map(CPU_LOCAL_APIC, apic_base & 0xFFFFF000)                                                                // No caching, etc.
Msr::write (Msr::IA32_APIC_BASE, apic_base | 0x800);
write (LAPIC_SVR, read (LAPIC_SVR) | 0x100);
*reinterpret_cast<uint32 volatile *>(CPU_LOCAL_APIC + LAPIC_LVT_PERFM) = NMI_DELIVERY_MODE;

/*Configure MSR_PERF_FIXED_CTR0 to have overflow interrupt*/
Msr::write(Msr::MSR_PERF_GLOBAL_CTRL, Msr::read<uint64>(Msr::MSR_PERF_GLOBAL_CTRL) | (1ull<<32));          // enable IA32_PERF_FIXED_CTR0
Msr::write(Msr::MSR_PERF_FIXED_CTRL, 0xa);                                                                 // configure IA32_PERF_FIXED_CTR0 to count in user mode and interrupt on overflow
Msr::write(Msr::MSR_PERF_FIXED_CTR0, (1<<48) - 0x1000);                                                    // overflow after 0x1000 instruction
Msr::write(Msr::MSR_PERF_GLOBAL_OVF_CTRL, Msr::read<uint64>(Msr::MSR_PERF_GLOBAL_OVF_CTRL) & ~(1UL<<32));  // clear overflow condition
4

0 回答 0