c - 如何在 ARM 处理器上检测冷启动与热启动？

Question

我正在寻找一种方法来确定 ARM 处理器是从冷启动（即初始开机）还是热启动（即在没有实际断电的情况下重置断言）启动。具体来说，我使用的是 ARM968 内核，将使用 C 或程序集进行确定，并且我将使用该确定，因此某些操作仅在初始开机时运行，而不是在随后的重置时运行。在以前的项目中，我利用外部电路（例如 FPGA）来检测不同的启动场景，但在这种情况下，我仅限于 ARM 内核。

Answer 1

检查特定芯片的文档（“ARM968”不够具体）。应该有一个描述复位原因的寄存器。例如，这是 LPC23xx 所具有的：

Reset Source Identification Register (RSIR - 0xE01FC180)

This register contains one bit for each source of Reset. Writing a 1 to any of these bits
clears the corresponding read-side bit to 0. The interactions among the four sources are
described below.

Bit Symbol Description
0 POR Assertion of the POR signal sets this bit, and clears all of the other bits in
this register. But if another Reset signal (e.g., External Reset) remains
asserted after the POR signal is negated, then its bit is set. This bit is not
affected by any of the other sources of Reset.
1 EXTR Assertion of the RESET signal sets this bit. This bit is cleared by POR,
but is not affected by WDT or BOD reset.
2 WDTR This bit is set when the Watchdog Timer times out and the WDTRESET
bit in the Watchdog Mode Register is 1. It is cleared by any of the other
sources of Reset.
3 BODR This bit is set when the 3.3 V power reaches a level below 2.6 V.
If the VDD(DCDC)(3V3) voltage dips from 3.3 V to 2.5 V and backs up, the
BODR bit will be set to 1.
If the VDD(DCDC)(3V3) voltage dips from 3.3 V to 2.5 V and continues to
decline to the level at which POR is asserted (nominally 1 V), the BODR
bit is cleared.
if the VDD(DCDC)(3V3) voltage rises continuously from below 1 V to a level
above 2.6 V, the BODR will be set to 1.
This bit is not affected by External Reset nor Watchdog Reset.
Note: Only in case when a reset occurs and the POR = 0, the BODR bit
indicates if the VDD(DCDC)(3V3) voltage was below 2.6 V or not.

Answer 2

You can initialize a global variable in RAM to a value that is unlikely during cold boot, and check for that during boot.

For microcontrollers normally the reset logic of the specific chip provides a status register, which indicates the source of the reset. I don't know if that exists for this bigger core, and whether you could use that.

Answer 3

这可能很困难，也许你的意思并不只是核心本身。内核应该已经重置，但外部的内存（但可能仍在芯片内）没有。如果内存是基于 DRAM 的，那么它可能仍然会在启动时被擦除。我不知道通用的一种尺寸适合所有答案。你和starblue都有它，你必须在某个地方找到一些在重置时没有清除的寄存器，将其设置为“可能”不会在上电时随机发生的东西。阅读它然后设置它。认为在板级（如果有）管理复位逻辑的 fpga 或 pld 是最好的，因为在上电复位时它们也会被复位，而在热复位时它们是导致它并保持其状态的那个.

挖掘内核的 TRM 或芯片的寄存器规范，看看是否有任何复位状态未定义的寄存器，一个你通常不使用的寄存器，如果你设置它不会伤害芯片，看看是什么它通电，这就是我要开始寻找的地方。