在 linux 内核 smp 中,pen_release 标识符用于启动辅助 cpu,我也发现它也在其他地方使用。
我已经在 sysdump 中检查了它的值,还尝试使用 lauterbach 设置来理解它,但无法获得使用它的基本概念。
据我所知,它是一种锁,用于将辅助 cpu 置于循环中,直到我们从主 cpu 释放笔。我试图通过各种方法确认这种理解,但没有得到太多。
谁能详细解释一下?
The answer is here : http://infocenter.arm.com/help/index.jsp?topic=/com.arm.doc.dai0425/ch04s07s01.html
While the primary core is booting, the secondary cores are held in a standby state, using the WFI instruction. The primary core provides a startup address for the secondary cores and wakes them using an Inter-Processor Interrupt (IPI), an SGI signaled through the GIC. Booting of the secondary cores is serialized, using the global variable pen_release. Conceptually, you can think of the secondary cores being in a holding pen and being released one at a time, under the control of the primary core.
The variable pen_release is set by the kernel code to the ID value of the processor to boot and then reset by that core when it has booted. When an inter-processor interrupt occurs, the secondary core checks the value of pen_release against their own ID value by using the MPIDR register.
Booting of the secondary core proceeds in a way similar to the primary core. The secondary core enables the MMU. It enables the interrupt controller interface to itself and calibrates the local timers. It sets a bit in cpu_online_map and calls cpu_idle(). The primary processor can detect the setting of the appropriate bit in cpu_online_map and set pen_release to the next secondary core.
Some more info here : http://elinux.org/images/0/00/Clement-smp-bring-up-on-arm-soc.pdf
You can see the code for mach-vexpress. Four functions are called in this sequence for the smp initialisation :
1) smp_init_cpus
2) smp_prepare_cpus
3) smp_boot_secondary
For mach-vexpress the function is versatile_boot_secondary() which writes the pen_release using write_pen_release(cpu_logical_map(cpu));
Then sends an IPI arch_send_wakeup_ipi_mask(cpumask_of(cpu));
4) smp_secondary_init
e.g versatile_secondary_init() function again makes the pen_release as -1
Isn't this how the primary CPU initializes/starts the secondarys