The first question could be: Why didn't Intel design the chip in a way that setting PE will enter protected mode?
The answer: This would not really be possible; it would assume that the CS register contains a selector whose base address is 0x10*CS.
In other words: If the address "mov CR0,EAX" is located at address 0x0100:0x1200 then the next instruction executed will be at address 0x0100:0x1203. So switching to protected mode will only be possible in conjunction with a jump instruction; otherwise switching PE itself would do an unwanted jump (from 0x0100:0x1203 Real Mode to 0x0100:0x1203 Protected Mode).
Technically the CPU internally stores the selector information of all selectors used. Whenever a selector register changes then the limit, base and so on are loaded. This means that loading the CS register is required for updating the base, limit and so of the CS register. This means: A far jump must be done (because this will load the CS register). Maybe a RETF would also work...
I'm not sure if loading the other segment registers (for example DS) would already work before the far jump so if you load the DS register before the far jump the base address and limit will be taken from the GDT. Would be nice to try this out...