vhdl - 通用位滑模块

Question

我想实现一个通用的位滑模块。下面是我想为 4 和 8 做的一个例子。我不知道如何编写代码，所以我可以传递一些通用的 N 并且代码将使用 for 循环或其他东西自动生成。

---- 4-bitslip
bits_slipped <= 
           bits_in(3 downto 0)                       when tap_sel = "00" else
           bits_in(2 downto 0) & bits_in(3)          when tap_sel = "01" else
           bits_in(1 downto 0) & bits_in(3 downto 2) when tap_sel = "10" else
           bits_in(0)          & bits_in(3 downto 1) when tap_sel = "11";

-- 8-bitslip
bits_slipped <= 
           bits_in(7 downto 0)                       when tap_sel = "000" else
           bits_in(6 downto 0) & bits_in(7)          when tap_sel = "001" else
           bits_in(5 downto 0) & bits_in(7 downto 6) when tap_sel = "010" else
           bits_in(4 downto 0) & bits_in(7 downto 5) when tap_sel = "011" else            
           bits_in(3 downto 0) & bits_in(7 downto 4) when tap_sel = "100" else
           bits_in(2 downto 0) & bits_in(7 downto 3) when tap_sel = "101" else
           bits_in(1 downto 0) & bits_in(7 downto 2) when tap_sel = "110" else               
           bits_in(0)          & bits_in(7 downto 1) when tap_sel = "111"; 

-- N-bitslip ????

Answer 1

您可以使用 中的rotate_right()功能numeric_std。只需在端口上使用不受约束的信号，您就可以使其适用于任何大小而无需泛型。如果需要，可以添加一个泛型来强制 bits_in 匹配 bits_slipped 的大小。

library ieee;
ise ieee.std_logic_1164.all;
use ieee.numeric_std.all;
...

port (
  bits_in : in unsigned;
  tap_sel : in unsigned;
  bits_slipped : out unsigned -- Must be same length as bits_in
);
...

bits_slipped <= rotate_right(bits_in, to_integer(tap_sel));