我对微芯片技术的 pic p24f16ka101 的 adc 有问题 http://www.microchip.com/wwwproducts/Devices.aspx?dDocName=en539798
我预计断点处的值为 0，但有一个增长的值，稳定在 900 左右。AN2（RB0）引脚直接接地，vref+ vref- 连接到 vdd，vss 与 pic alimentation 相同。
我是新手，我不知道我错了什么
#include <stdio.h>
#include <stdlib.h>
#include <p24F16KA101.h>
#include "config_debug.h"
//<editor-fold defaultstate="collapsed" desc=" DEFINES ">
#define TRIS_LEDG _TRISA2
#define TRIS_LEDR _TRISA3
#define TRIS_DIMMER _TRISA6
#define LEDG _LATA2
#define LEDR _LATA3
#define DIMMER _LATA6
//</editor-fold>
void initADC(){
_ADC1MD = 0;
SRbits.IPL = 2; //CPU > 1, no lvl 1 ISRs occur
AD1CON1bits.ADON = 0; // turn ADC ON
Nop(); Nop(); Nop(); Nop(); Nop(); Nop(); Nop(); Nop(); Nop(); Nop();
AD1PCFG = 0b1111111111111000; // AN2 as analog, all other pins are digital
AD1CON1 = 0x80E0; // SAMP bit = 0 ends sampling and starts converting
AD1CHS = 0x0002; // Connect AN2 as S/H+ input
// in this example AN2 is the input
AD1CSSL = 0;
AD1CON3 = 0x0002; // Manual Sample, Tad = 3Tcy
AD1CON2 = 0x6000;
Nop(); Nop(); Nop(); Nop(); Nop(); Nop(); Nop(); Nop(); Nop(); Nop();
AD1CON1bits.ADON = 1; // turn ADC ON
Nop(); Nop(); Nop(); Nop(); Nop(); Nop(); Nop(); Nop(); Nop(); Nop();
_TRISA0 = 1; // vref+
_TRISA1 = 1; // vref-
_TRISB0 = 1; // an battery
IFS0bits.AD1IF = 0; // Clear A/D conversion interrupt.
// Configure A/D interrupt priority bits (AD1IP<2:0>) here, if
// required. Default priority level is 4.
IEC0bits.AD1IE = 1;
}
void __attribute__ ((__interrupt__)) _ADC1Interrupt(void)
{
int done = _DONE;
int samp = _SAMP;
int adc0 = ADC1BUF0;
int adc1 = ADC1BUF1;
int adc2 = ADC1BUF2;
int adc3 = ADC1BUF3;
Nop();
Nop();
Nop();
IFS0bits.AD1IF = 0;
_SAMP = 1;
}
int main(int argc, char** argv) {
_RCDIV = 0;
_SPIEN = 0;
initADC();
_SAMP = 1;
while(1){
Nop();
}
return (EXIT_SUCCESS);
}
这是我的配置
// PIC24F16KA101 Configuration Bit Settings
// 'C' source line config statements
#include <xc.h>
// FBS
#pragma config BWRP = OFF // Table Write Protect Boot (Boot segment may be written)
#pragma config BSS = OFF // Boot segment Protect (No boot program Flash segment)
// FGS
#pragma config GWRP = OFF // General Segment Code Flash Write Protection bit (General segment may be written)
#pragma config GCP = OFF // General Segment Code Flash Code Protection bit (No protection)
// FOSCSEL
#pragma config FNOSC = FRCPLL // Oscillator Select (Fast RC oscillator with divide-by-N with PLL module (FRCDIV+PLL))
#pragma config IESO = ON // Internal External Switch Over bit (Internal External Switchover mode enabled (Two-Speed Start-up enabled))
// FOSC
#pragma config POSCMOD = NONE // Primary Oscillator Configuration bits (Primary oscillator disabled)
#pragma config OSCIOFNC = ON // CLKO Enable Configuration bit (CLKO output signal is active on the OSCO pin)
#pragma config POSCFREQ = HS // Primary Oscillator Frequency Range Configuration bits (Primary oscillator/external clock input frequency greater than 8 MHz)
#pragma config SOSCSEL = SOSCHP // SOSC Power Selection Configuration bits (Secondary oscillator configured for high-power operation)
#pragma config FCKSM = CSDCMD // Clock Switching and Monitor Selection (Both Clock Switching and Fail-safe Clock Monitor are disabled)
// FWDT
#pragma config WDTPS = PS32768 // Watchdog Timer Postscale Select bits (1:32,768)
#pragma config FWPSA = PR128 // WDT Prescaler (WDT prescaler ratio of 1:128)
#pragma config WINDIS = OFF // Windowed Watchdog Timer Disable bit (Standard WDT selected; windowed WDT disabled)
#pragma config FWDTEN = ON // Watchdog Timer Enable bit (WDT enabled)
// FPOR
#pragma config BOREN = BOR3 // Brown-out Reset Enable bits (Brown-out Reset enabled in hardware; SBOREN bit disabled)
#pragma config PWRTEN = ON // Power-up Timer Enable bit (PWRT enabled)
#pragma config I2C1SEL = PRI // Alternate I2C1 Pin Mapping bit (Default location for SCL1/SDA1 pins)
#pragma config BORV = V18 // Brown-out Reset Voltage bits (Brown-out Reset set to lowest voltage (1.8V))
#pragma config MCLRE = ON // MCLR Pin Enable bit (MCLR pin enabled; RA5 input pin disabled)
// FICD
#pragma config ICS = PGx3 // ICD Pin Placement Select bits (PGC3/PGD3 are used for programming and debugging the device)
// FDS
#pragma config DSWDTPS = DSWDTPSF // Deep Sleep Watchdog Timer Postscale Select bits (1:2,147,483,648 (25.7 Days))
#pragma config DSWDTOSC = LPRC // DSWDT Reference Clock Select bit (DSWDT uses LPRC as reference clock)
#pragma config RTCOSC = SOSC // RTCC Reference Clock Select bit (RTCC uses SOSC as reference clock)
#pragma config DSBOREN = ON // Deep Sleep Zero-Power BOR Enable bit (Deep Sleep BOR enabled in Deep Sleep)
#pragma config DSWDTEN = ON // Deep Sleep Watchdog Timer Enable bit (DSWDT enabled)