我需要帮助!
我有一个 TI msp-exp430g2 启动板和一个 RFM22B,我需要它们相互通信,但我不知道该怎么做。经过一段时间后,我想出了下面的代码来将数据发送到 RFM22。我有一个示波器连接到 RFM22 的 ANT 引脚,我只能看到噪声而没有输出!
谁能告诉我我做错了什么(很多滥用),也许有人有示例代码或可以提供帮助的项目。
#include <msp430.h>
/*
* main.c
*
// MSP430G2xx3
// -----------------
// /|\| XIN|-
// | | |
// --|RST XOUT|-
// | |
// | P1.2|-> Data Out (UCA0SIMO)
// | |
// LED <-|P1.0 P1.3|-> nSel
// | |
// | P1.4|-> Serial Clock Out (UCA0CLK)
*
*/
//unsigned int address;
//unsigned char data;
void init(void);
void initRFM(void);
void write(int address, char data);
void txRFM(void);
int main(void) {
WDTCTL = WDTPW | WDTHOLD; // Stop watchdog timer
int t;
for (t=0;t<150;t++){ // 150 ms now
__delay_cycles(1000); // 1000 usec
}
init();
initRFM();
while(1){
txRFM();
}
return 0;
}
void txRFM(void){
unsigned char i;
write(0x07, 0x01); // To ready mode
__delay_cycles(50);
write(0x08, 0x03); // FIFO reset
write(0x08, 0x00); // Clear FIFO
write(0x34, 64); // preamble = 64nibble
write(0x3E, 17); // packet length = 17bytes
for (i=0; i<17; i++)
{
write(0x7F, 0xAA); // send payload to the FIFO
}
write(0x05, 0x04); // enable packet sent interrupt
write(0x07, 9); // Start TX
}
void write(int address, char data){
P1OUT &= ~BIT3; // start write
address |= 0x80;
UCA0TXBUF = address;
while ( ! ( IFG2 & UCA0TXIFG ) ) ;
UCA0TXBUF = data;
__delay_cycles(20);
P1OUT |= BIT3; // end write
}
void init(void) {
P1DIR |= BIT3; // P1.3 nSEL for writing to RFM22
P1OUT |= BIT3; // no write
P1SEL |= BIT2 + BIT4; // P1.4 clock out, P1.2 data out (UCA0SIMO)
P1SEL2 |= BIT2 + BIT4;
UCA0CTL0 |= UCCKPL + UCMSB + UCMST + UCSYNC; // UCCKPL- inactive high, UCMSB- MSB first, UCMST- Master mode, UCSYNC- sync mode
UCA0CTL1 |= UCSSEL_2; // SMCLK
UCA0BR0 |= 0x02; // /2
UCA0BR1 = 0; //
UCA0MCTL = 0; // No modulation
UCA0CTL1 &= ~UCSWRST; // **Initialize USCI state machine**
IE2 |= UCA0RXIE; // Enable USCI0 RX interrupt
}
void initRFM(void){
//write(0x03, 0x00); // Disable all interrupts
write(0x07, 0x01); // Set READY mode
write(0x09, 0x7F); // Cap = 12.5pF
write(0x0A, 0x05); // Clk output is 2MHz
write(0x0B, 0xF4); // GPIO0 is for RX data output
write(0x0C, 0xEF); // GPIO1 is TX/RX data CLK output
write(0x0D, 0x00); // GPIO2 for MCLK output
write(0x0E, 0x00); // GPIO port use default value
write(0x0F, 0x70); // NO ADC used
write(0x10, 0x00); // no ADC used
write(0x12, 0x00); // No temp sensor used
write(0x13, 0x00); // no temp sensor used
write(0x70, 0x20); // No manchester code, no data whiting, data rate < 30Kbps
write(0x1C, 0x1D); // IF filter bandwidth
write(0x1D, 0x40); // AFC Loop
//write(0x1E, 0x0A); // AFC timing
write(0x20, 0xA1); // clock recovery
write(0x21, 0x20); // clock recovery
write(0x22, 0x4E); // clock recovery
write(0x23, 0xA5); // clock recovery
write(0x24, 0x00); // clock recovery timing
write(0x25, 0x0A); // clock recovery timing
//write(0x2A, 0x18);
write(0x2C, 0x00);
write(0x2D, 0x00);
write(0x2E, 0x00);
write(0x6E, 0x27); // TX data rate 1
write(0x6F, 0x52); // TX data rate 0
write(0x30, 0x8C); // Data access control
write(0x32, 0xFF); // Header control
write(0x33, 0x42); // Header 3, 2, 1, 0 used for head length, fixed packet length, synchronize word length 3, 2,
write(0x34, 64); // 64 nibble = 32 byte preamble
write(0x35, 0x20); // 0x35 need to detect 20bit preamble
write(0x36, 0x2D); // synchronize word
write(0x37, 0xD4);
write(0x38, 0x00);
write(0x39, 0x00);
write(0x3A, 's'); // set tx header 3
write(0x3B, 'o'); // set tx header 2
write(0x3C, 'n'); // set tx header 1
write(0x3D, 'g'); // set tx header 0
write(0x3E, 17); // set packet length to 17 bytes
write(0x3F, 's'); // set rx header
write(0x40, 'o');
write(0x41, 'n');
write(0x42, 'g');
write(0x43, 0xFF); // check all bits
write(0x44, 0xFF); // Check all bits
write(0x45, 0xFF); // check all bits
write(0x46, 0xFF); // Check all bits
write(0x56, 0x01);
write(0x6D, 0x07); // Tx power to max
write(0x79, 0x00); // no frequency hopping
write(0x7A, 0x00); // no frequency hopping
write(0x71, 0x22); // GFSK, fd[8]=0, no invert for TX/RX data, FIFO mode, txclk-->gpio
write(0x72, 0x48); // Frequency deviation setting to 45K=72*625
write(0x73, 0x00); // No frequency offset
write(0x74, 0x00); // No frequency offset
write(0x75, 0x53); // frequency set to 434MHz
write(0x76, 0x64); // frequency set to 434MHz
write(0x77, 0x00); // frequency set to 434Mhz
write(0x5A, 0x7F);
write(0x59, 0x40);
write(0x58, 0x80);
write(0x6A, 0x0B);
write(0x68, 0x04);
write(0x1F, 0x03);
}