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我在如何制作时钟分频器中找到了这段代码。我对如何使用计数器制作分隔线有一个大致的了解，但我不确定这段代码在做什么以及为什么这样做。

entity clkdiv is
    Port ( mclk : in  STD_LOGIC;
           clr : in  STD_LOGIC;
           clk190 : out  STD_LOGIC;
           clk48 : out  STD_LOGIC);
end clkdiv;

architecture clkdiv of clkdiv is
signal q: std_logic_vector(23 downto 0);
begin
    --clock divider
    process(mclk,clr)
    begin   
        if clr ='1' then
            q <= X"000000";
        elsif mclk'event and mclk = '1' then
            q <= q+1;
        end if;
    end process;
    clk48 <= q(19);
    clk190 <= q(17);

end clkdiv;

我知道这个例子是基于2板的，输入时钟是50MHz。此代码应该创建一个 48hz 时钟信号和 190hz 时钟信号。

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2 回答 2

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50MHz/48Hz = 104166.7，所以你无法准确到达那里。

如果您使用在 50MHz 时计数高达 104167 的计数器，您将获得接近 48 Hz 的单个脉冲（47.9999846 Hz - 这对于大多数用途来说可能已经足够了）。

不要将计数器的输出用作时钟，当它环绕时使用单个脉冲作为时钟使能 - 这样可以获得更好的结果。整个设计中启用部分的单个时钟是实现此目的的方法。

于 2013-10-31T16:44:34.480 回答
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What the above code does is simply that it creates a VHDL module containing a 24 bit counter q, which is counted up on each rising edge from the master clock mclk. It then derives clk190 and clk48 by using different bits of this counter directly as clock signals.

For instance, with mclk at 50 MHz, the lsb (q(0)), would effectively run at 25 MHz. Each rising edge of mclk gives you one edge on q(0) - similarly upwards, so that each subsequent bit runs at half the frequency of the previous bit.

For instance:

mclk = 50 MHz
q(0) = mclk / 2 = 25 Mhz
q(1) = q(0) / 2 = mclk / 4 = 12.5 MHz
...
q(n) = mclk / (2^(n+1))

Your derived clocks will thus be depend on your master clock, and be:

q(17) = 50 MHz / 262144 = 191 Hz
q(19) = 50 MHz / 1048576 = 48 Hz

However - generating clocks like this is often the wrong way to do it!

It may seem as if you get nice synchronized clocks, but in reality, they'll be slightly skewed compared to each other, since you're generating what is known as a gated clock (many tools will even warn you about this).

More info on that here, including a way of doing the same thing (but better) with clock enables: VHDL: creating a very slow clock pulse based on a very fast clock

于 2013-10-31T14:01:17.160 回答