它向我显示了一个错误: ERROR:Xst:787 - "E:/tumama/tytyty.vhd" line 54: Index value <4> is not in Range of array 。
它是一个“通用”代码,我的嵌入信号 A 具有 n 的 5 位,我只想在一个案例中使用 4 位进行转换。所以我在 Y 中有 4 位注释是针对并发代码的
但我不明白谢谢
library IEEE;
use IEEE.STD_LOGIC_1164.ALL;
entity FirstTermExamen is
Generic (n: natural := 4);
Port ( Num : in STD_LOGIC_VECTOR (n-1 downto 0);
Sel : in STD_LOGIC;
Y : out STD_LOGIC_VECTOR (n-1 downto 0)
);
end FirstTermExamen;
architecture Behavioral of FirstTermExamen is
signal A: STD_LOGIC_VECTOR (n downto 0);
begin
-- --Secuencial Description
-- Binary_Gray : process(A, Num, Sel)
-- begin
--
-- --Initial conditions
-- A(0) <= Num(0);
-- A(1) <= Num(0) xor Num(1);
--
-- for i in 1 to n-1 loop
-- if Sel = '1' then A(i+1) <= Num(i) xor Num(i+1);
-- else A(i+1) <= A(i) xor Num(i+1);
--
-- end if;
--
-- end loop;
--
-- for j in 0 to n loop
-- Y(j)<= A(j);
--
-- end loop;
--
--end process Binary_Gray;
--Concurrent Description
A(0) <= Num(0);
A(1) <= Num(0) xor Num(1);
Binary_Gray:
for i in 1 to n-1 generate
begin
A(i+1) <= Num(i) xor Num(i+1) when Sel = '1' else
A(i) xor Num(i+1);
end generate;
output:
for j in 0 to n generate
begin
Y(j)<= A(j);
end generate;
end Behavioral;