我有一个为 Verilog 的子集生成的 BISON 解析器。我看到解析器在读取整个文件之前跳转到文件末尾。我正在粘贴解析器中的日志片段和我要解析的文件。
Stack now 0 1 6 10 13 29 13 29 13 29 13 29 13 29 13 29 13 29 13 29 13
Entering state 29
Reading a token: --accepting rule at line 85(";")
Next token is token SEMICOLON (design.v:1.207: )
Shifting token SEMICOLON (design.v:1.207: )
Entering state 13
Reading a token: --accepting rule at line 100("0")
Next token is token NUMBER (design.v:1.208: )
Reducing stack by rule 12 (line 174):**
$1 = token SEMICOLON (design.v:1.207: )
-> $$ = nterm module_item_list (design.v:1.207: )
Stack now 0 1 6 10 13 29 13 29 13 29 13 29 13 29 13 29 13 29 13 29 13 29
Entering state 44
Reducing stack by rule 11 (line 172):
$1 = token SEMICOLON (design.v:1.185: )
正在解析的代码如下
wire [3:0] z;
wire w1, w2, w3, w4, w5, w6, w7;
not (z[0], a[0]);
xnor (z[1], a[0], a[1]);
它在“not();”结尾失败
任何意见表示赞赏.. 谢谢。