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我想知道是否可以覆盖生成文件中的目标！由于自动生成，我工作的环境不允许我这样做！我想知道我是否在静态目标之上或之下编写了相同的规则，这会实现覆盖吗？

%_emul.flist: $(if ${GEN_FLIST},%_synth.flist,) ${rdlh_file_deps}
    ${QUIET}if test ${SYN_DEBUG} -eq 1 ; then set -xv ; fi; \
    $(if ${TOOL_VERILOG},rm -f $@; touch $@,$(if ${TOOL_BBOX_LIBS},echo ${TOOL_BBOX_LIBS} > $@,rm -f $@; touch $@))
    /bin/sed -e '/\/libs\//d' -e '/\/place\//d' $(foreach mod,$(filter %.vhd,$^),-e 's%^\(.*\/\)\{0,1\}$(basename $(notdir ${mod}))\.v$$%${mod}%') $*_synth.flist >> $@
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Yes , i think that would work .... but you need to be a bit more careful in the way you code things. You don't want to override something that might be useful!

GNU make would take the most recent of the target it encounters. So, the following works (but not as i would have liked it to work :( )

Output: I think you are looking for something like this --

Kaizen ~/make_prac $  make -nf mk.name
mk.name:20: warning: overriding recipe for target `name'
mk.name:17: warning: ignoring old recipe for target `name'
arg1="Kaizen" ;
echo "hello "" ;" ;
hello  ;

Code: Here the target "name" appears twice and is overridden.

Kaizen ~/make_prac $ cat mk.name
##
## make to accept name and display hello name
##

arg1="" ;

.PHONY : name \
  hello

#.DEFAULT :
#       hello

hello : name
        + echo "hello $(arg1)" ;

name :
        echo "name given is : $(arg1)" ;

name :
        arg1="Kaizen" ;

PS: Take note of the use of : -- if you use :: then both rules get executed.

Explanation for the arg1 .... not showing in the output: The variable arg1, even though it gets assigned in the first parsing, it gets ignored, since its assignment is target dependent. If you would have had a variable declaration elsewhere -- e.g. like arg1 is defined at the start -- there would not be any dereferencing issues.

于 2013-07-23T00:57:36.047 回答