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I was reading the source code for the model-specific register (MSR) driver kernel extension that ships with the Intel Performance Counter Monitor (http://software.intel.com/en-us/articles/intel-performance-counter-monitor-a-better-way-to-measure-cpu-utilization). Since independent copies of the MSRs/performance counters are stored on different CPUs, it is necessary to specify which CPU to read from. This is done by calling the mp_rendezvous_no_intrs function. 

mp_rendezvous_no_intrs(cpuReadMSR, (void*)idatas);

This causes each processor the check if it is the correct processor number, and if so read the data from the MSR: 

void cpuReadMSR(void* pIData){
    pcm_msr_data_t* data = (pcm_msr_data_t*)pIData;
    volatile uint cpu = cpu_number();
    if(data->cpu_num == cpu)
    {
        data->value = RDMSR(data->msr_num);
    }
}

My question is: is turning off interrupts (via however mp_rendezvous_no_intrs does it) enough to cause the thread running the cpuReadMSR function to stay on the same CPU the whole time? If it is not, I worry about the following failure scenario:

  1. The cpu reads its numerical id with cpu_number(), decides that it is the correct CPU, and starts to read the MSR.
  2. The thread is preempted by the scheduler and moved to a different CPU.
  3. The MSR is read, but now is read from a different CPU, thus giving the wrong value.
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禁用中断会禁用所有中断，而不仅仅是其中一些。这包括定时器中断，这通常允许正在运行的线程被抢占。

虽然中断被禁用，但没有任何东西（除了像 CPU 异常这样疯狂的东西）可以中断您的代码在单个 CPU 上从头到尾运行。

于 2013-05-09T21:14:19.407 回答