warnings - VHDL 乘法器代码中的综合警告

Question

当我合成这个 32 位乘法器代码时，我没有收到任何错误，只是警告我的输入未使用并且已分配但未使用。我的代码是这样的：

library IEEE;
use IEEE.STD_LOGIC_1164.ALL;

entity multiplier is
    Port ( multiplicand : in  STD_LOGIC_VECTOR(31 downto 0);
           multiply : in  STD_LOGIC_VECTOR(31 downto 0);
           clk : in  STD_LOGIC;
           product : out  STD_LOGIC_VECTOR(63 downto 0));
end multiplier;

architecture Behavioral of multiplier is

    component adder32bit is
        port(addone, addtwo : in STD_LOGIC_VECTOR(31 downto 0);
                sum : out STD_LOGIC_VECTOR(31 downto 0);
                cout : out STD_LOGIC);
    end component;

    signal tempsum : STD_LOGIC_VECTOR(31 downto 0);
    signal preg : STD_LOGIC_VECTOR(63 downto 0);
    signal start : STD_LOGIC := '1';
    signal tempcout : STD_LOGIC;
    signal counter : integer := 1;
begin

    addN: adder32bit port map(multiplicand, preg(63 downto 32), tempsum, tempcout); 

    process(clk)
    begin
        if(rising_edge(clk)) then
            if(start = '1') then

                if(counter = 1) then
                    preg <= "00000000000000000000000000000000" & multiply;
                end if;

                if(preg(0) = '1') then
                    preg(63 downto 32) <= tempsum;
                    preg <= tempcout & preg(63 downto 1);
                else
                    preg <= '0' & preg(63 downto 1);
                end if;

                counter <= counter + 1;

                if(counter = 33) then
                    product <= preg;
                    start <= '0';
                    counter <= 1;
                end if;

            end if;
        end if;
    end process;

end Behavioral;

当我运行模拟时，无论我的两个输入是什么（乘和乘），输出都将是这样的：“0000...UUUUUUU”

关于我应该在这里做什么的任何建议？

Answer 1

一种初始化方法preg只涉及对代码的微小更改......

            if(counter = 1) then
                preg <= "00000000000000000000000000000000" & multiply;
            else
               if(preg(0) = '1') then ...
            end if;