vhdl - 标量与向量的乘法

Question

我正在用 VHDL 编写代码，其中一个数字乘以一个向量。但它给出了一个错误。

Library IEEE;
use IEEE.std_logic_1164.all;
use IEEE.numeric_std.all;

entity multi is
 port (    clk   :  in std_logic;
          ipixel :  in std_logic_vector(15 downto 0);
          opixel  :  out std_logic_vector(15 downto 0)
      );

end entity multi;

architecture rtl of multi is
begin

process (clk) begin
  if rising_edge (clk) then

        opixel (15 downto 11) <=  std_logic_vector(unsigned(ipixel(15 downto 11))*3);
        opixel (10 downto 5)  <= std_logic_vector(unsigned(ipixel(10 downto 5))* 3);
        opixel (4 downto 0)   <= std_logic_vector(unsigned(ipixel(4 downto 0))* 3);

    end if;
end process;
end architecture rtl;

错误是：

目标切片 5 个元素；值为 10 个元素

Answer 1

当您将无符号值与natural相乘时，其定义NUMERIC_STD如下：

function "*" (L: UNSIGNED; R: NATURAL) return UNSIGNED is
begin
    return L * TO_UNSIGNED(R, L'LENGTH);
end "*";

返回值将导致2 * length您的无符号因子！