我很困惑,因为从阅读 wiki 页面来看,似乎只有一个用于加载和存储的 checkValidate 和提交系统。目的是解决同步问题吗?它是建立在当前硬件之上的软件编程,还是通过 ISA 实现的硬件?每个(硬件/软件)实现之间有什么区别?
谢谢。
我很困惑,因为从阅读 wiki 页面来看,似乎只有一个用于加载和存储的 checkValidate 和提交系统。目的是解决同步问题吗?它是建立在当前硬件之上的软件编程,还是通过 ISA 实现的硬件?每个(硬件/软件)实现之间有什么区别?
谢谢。
Transactional Memory is the concept of using transactions rather than locks to synchronise processes that execute in parallel and share memory.
At a very simplified level, to synchronise with locks you identify sections of code (called critical sections) that must not be executed simultaneously by different threads and acquire and release locks around the critical sections. Since each lock can only be held by one thread at a time, this guarantees that once one thread enters a critical section, all of the section's operations will have been completed before another thread enters a critical section protected by the same lock(s).
Transactional memory instead lets you designate sections of code as transactions. The transactional memory system (which can be implemented in hardware, software, or both) then attempts to give you the guarantee that any run of a program in which multiple threads execute transactions in parallel will be equivalent to a different run of the program in which the transactions all executed one after another, never at the same time.
The transactional memory system does this by allowing transactions to execute in parallel and monitoring their access to transaction variables. If the system detects a conflict between two transactions' access to the same variable, it will cause one of them to abort and "rollback" to the beginning of the transaction it was running; it will then automatically restart the transaction, and the overall state of the system will be as if it had never started the earlier run.
One goal of transactional memory is ease-of-programming and safety; a properly implemented TM system which is able to enforce that transactions are used correctly gives hard guarantees that there are no parallelism bugs (deadlocks, race conditions, etc) in the program, and only requires that the programmer designate the transactions (and sometimes transaction variables, if the system doesn't just consider all of memory to implicitly be transaction variables), without needing to identify exactly what locks are needed, acquire them in the correct order to prevent deadlock, etc, etc. "Transacitons are used correctly" implies that there is no sharing data between threads without going through transaction variables, no access to transactional data except in transactions, and no "un-rollbackable" operations inside transactions); library based software transactional memory systems for imperative languages like C, Java, etc generally are unable to enforce all of this, which can re-introduce the possibility of some of the parallelism bugs.
Another goal of transactional memory is increasing parallelism; if you have a whole bunch of parallel operations which access some data structure, all of which might write to it but few of which actually do, then lock-based synchronisation typically requires that all of the operations run serially to avoid the chance of data corruption. Transactional memory would allow almost all of the operations to run in parallel, only losing parallelism when some process actually does write to the data structure.
In practice (as of when I researched my honours project a few years ago), hardware-based transactional memory hasn't really taken off, and current software transactional memory systems have significant overheads. So software transactional memory is more aimed at "reasonable performance that scales with the available processors moderately well and is pretty easy to code", rather than giving you absolute maximal performance.
There's a lot of variability between different transactional memory systems though; I'm speaking at quite an abstract and simplified level here.
来自gcc 维基:
通常,实现有两种形式: 软件事务内存 (STM) 系统使用锁或其他标准原子指令来完成其工作。 硬件事务内存 (HTM) 系统使用多字同步 CPU 的操作以直接实现事务的要求 (例如,参见 Rock 处理器)。因为大多数 HTM 系统可能是最好的 努力设施(即,并非所有交易都可以使用 HTM 执行), 包含 HTM 的实用 TM 实现也具有 STM 组件 因此被称为混合事务内存系统。
在实现级别,事务内存是缓存层的一部分。它允许软件在内存上“尝试”某些操作,然后仅在系统中没有其他多处理器修改任何已读取或写入的内存时才“提交”它们。在大多数访问不会发生冲突的非常并行的 SMP 环境中,这可能比让所有线程锁定相同(高度竞争的)同步原语更快。
但是,它使应用程序程序员的任务更加困难,因为如果提交失败,软件必须能够恢复(“回滚”)事务。