gnu-make - Overwiting target directory in catch-all rule in GNU Makefile

Question

Consider the following:

SRCS = somefile.c util/someother.c ../src/more.c

%.o : %.c
    $(GCC) -MD -c $< -o $@ -Wp,-MD,.deps/$*.d
    @cp .deps/$*.d .deps/$*.P; \
      sed -e 's/#.*//' -e 's/^[^:]*: *//' -e 's/ *\\$$//' \
          -e '/^$$/ d' -e 's/$$/ :/' < .deps/$*.d >> .deps/$*.P; \
      rm -f .deps/$*.d

-include $(SRCS:%.c=.deps/%.P)

How would I change the above so that the .o files end up in ./? Currently they build in the directory the source file exists in and that's bad.

Answer 1

我会这样做：

SRCS = somefile.c someother.c more.c

%.o : %.c
    [same as before]

-include $(SRCS:%.c=.deps/%.P)

vpath %.c util ../src