vhdl - GHDL中标识符中的错误字符

Question

我正在尝试在 Ubuntu 17.10 中用 GHDL 编译以下组件。这是组件的代码：

library ieee;
use ieee.std_logic_1164.all;
use ieee.numeric_std.all; -- Unsigned

entity simple is end simple;
architecture behaviour of simple is
    signal clk : std_logic := '0';
    signal sigterm : std_logic := '0';
    signal counter : unsigned(7 downto 0) := x"00";
begin
    process
    begin
        wait for 5 us;
        clkloop : loop
            wait for 1 us;
            clk <= not clk;
            if sigterm = '1' then
                exit;
            end if;
        end loop clkloop;
        wait for 5 us;
        wait;
    end process;

    process (clk)
    begin
        if rising_edge(clk) then
            if counter = 16 then
                sigterm <= '1';
            end if;
            counter <= counter + 1;
        end if;
    end process;
end behaviour;

我在详细说明组件时收到此错误消息：

ghdl:*command-line*: bad character in identifier

我使用以下标志来使命令在我的 64 位机器上工作，我不知道它们是否完全正常：

ghdl -a -Wa,--32 -Wl,--32 simple.vhdl
ghdl -e -Wa,--32 -Wl,--32 simple.vhdl 

Answer 1

This is an elaboration error message: what is expected here is the name of a design unit, not a file name, plus, if it is not the default work, the name of the library.

ghdl -a -Wa,--32 -Wl,--32 simple.vhdl
ghdl -e -Wa,--32 -Wl,--32 simple

Or, if you compile simple.vhdl in library foolib:

ghdl -a -Wa,--32 -Wl,--32 --work=foolib simple.vhdl
ghdl -e -Wa,--32 -Wl,--32 --work=foolib simple